RT9824 1 ds9824-01 april 2011 www.richtek.com pin configurations (top view) ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. tsot-23-8 smart multi-voltage detector features z z z z z capable of monitoring three inputs precisely z z z z z detection threshold voltages ` ` ` ` ` vcc connect to 5v or 3.3v standby power ` ` ` ` ` v5 : 5v x 80% ` ` ` ` ` v54 : 5.4v x 80% ` ` ` ` ` vadj : 1v (using resistor divider) z z z z z accuracy : 2% z z z z z reset (open drain output active low) z z z z z built-in recovery delay 300ms z z z z z ctr (open drain output active low) z z z z z manual reset (mr) function z z z z z tsot-23-8 package z z z z z rohs compliant and halogen free applications z lcd tv or monitors z consumer electronic products z system voltage detector general description the RT9824 is an integrated smart multi-voltage detector supervising three power supply voltage levels including 5v, 5.4v and additional 3.3v, 12v or other voltage which can be determined by external divided resisters. the RT9824 performs supervisory function by sending out reset and ctr signals whenever the monitored voltages fall below 80% of voltage levels. the reset and ctr signals will last the whole period before vcc recovering. once the supervising voltages are recovered to higher than 80% of the voltage levels, the reset and ctr signal will be released after 300ms delay time. mr (manual reset) controls ctr signal during three monitored power supply voltages at normal voltage levels. when mr signal is in logic high, the ctr signal will be pulled low immediately. however the reset will not be interfered and will be kept at high level. the RT9824 is available in the tsot-23-8 package. ctr gnd mr vcc v5 vadj reset v54 5 34 6 8 2 7 marking information af= : product code dnn : date code af=dnn package type j8 : tsot-23-8 lead plating system g : green (halogen free and pb free) RT9824
RT9824 2 ds9824-01 april 2011 www.richtek.com function block diagram pin no. pin name pin function 1 ctr control output (open drain, active-low). only when v cc is > por, v5 is > 80%, v54 is > 80%, and v adj is > 1v, the ctr will delay 300ms and become high. once v5 or v54 or v adj is <80%, the signal will become low. when mr is high, ctr will become low. 2 reset reset output (open drain, active-low). only when v cc is > por, v5 is > 80%, v54 is > 80%, and v adj is > 1v, the reset will delay 300ms and become high. once v5 or v54 or v adj is < 80%, the signal will become low. 3 gnd ground . 4 mr manual reset input. manual reset with internal pull high resister (1m ), h : ctr = low; l : ctr signal is dependent on voltage detector output. 5 vadj voltage detection input. connect 12v or other power with external resister divider to this pin. the v adj logic-high threshold voltage is 1v. 6 v5 5v voltage detection input. the detection threshold is 5v x 80%. 7 v54 54v voltage detection input. the detection threshold is 5.4v x 80%. 8 vcc connect this pin to standby power from system. functional pin description typical application circuit delay 300ms voltage regulator por voltage detector (v th = 1v) mr vcc v5 vadj v54 ctr v ref voltage detector (v th = 5v x 80%) voltage detector (v th = 5.4v x 80%) reset gnd ctr gnd mr vcc v5 vadj v54 RT9824 3.3v or 5v 12v manual reset 5v 5.4v 1 2 3 8 5 4 6 7 100k pull up reset p vdd reset r1 r2 p vdd ctr 100k pull up
RT9824 3 ds9824-01 april 2011 www.richtek.com electrical characteristics parameter symbol test conditions min typ max unit vcc supply current i vcc without load -- -- 200 a vcc operating voltage v cc 2.97 5 5.94 v vcc por rising v por -- 2.8 -- v vcc por hysteresis v por_hys -- 0.15 -- v voltage detector & mute threshold v5 high threshold voltage v5 th 3.92 4 4.08 v v54 high threshold voltage v54 th 4.23 4.32 4.41 v vadj high threshold voltage vadj th 0.98 1 1.02 v manual reset high voltage v ih 2 -- -- v manual reset low voltage v il -- -- 0.8 v voltage detector deglitch and delay voltage detectors delay time t delay 200 300 -- ms voltage detectors deglitch time t deg li tch -- 20 -- s output : open drain reset output low voltage v ol_reset v cc = 3.3v, 5ma sinking current at reset output -- -- 0.3 v ctr output low voltage v ol_ctr v cc = 3.3v, 5ma sinking current at ctr output -- -- 0.3 v recommended operating conditions (note 4) z junction temperature range --------------------------------------------------------------------------------------------- ? 40 c to 125 c absolute maximum ratings (note 1) z vcc, ctr, mr, reset, v5, v54, vadj ------------------------------------------------------------------------------ ? 0.3v to 6.5v z power dissipation, p d @ t a = 25 c tsot-23-8 --------------------------------------------------------------------------------------------------------------------- 0.435w z package thermal resistance (note 2) tsot-23-8, ja --------------------------------------------------------------------------------------------------------------- 230 c/w z junction temperature ------------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) --------------------------------------------------------------------------------- 260 c z storage temperature range ---------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ------------------------------------------------------------------------------------------------ 2kv mm (ma chine mode) -------------------------------------------------------------------------------------------------------- 200v (v cc = 5v, t a = 25 c, unless otherwise specified)
RT9824 4 ds9824-01 april 2011 www.richtek.com note 1. stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 2. ja is measured in the natural convection at t a = 25 c on a low effective single layer thermal conductivity test board of jedec 51-3 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT9824 5 ds9824-01 april 2011 www.richtek.com typical operating characteristics vadj detector delay time vs. temperature 250 275 300 325 350 375 400 425 450 -50 -25 0 25 50 75 100 125 temperature (c) vadj detector delay time (ms) v cc = 5v v cc = 3.3v v54 detector delay time vs. temperature 250 275 300 325 350 375 400 425 450 -50 -25 0 25 50 75 100 125 temperature (c) v54 detector delay time (ms) v cc = 5v v cc = 3.3v v5 detector delay time vs. temperature 250 275 300 325 350 375 400 425 450 -50 -25 0 25 50 75 100 125 temperature (c) v5 detector delay time (ms) v cc = 5v v cc = 3.3v vadj detector deglitch time vs. temperature 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 temperature (c) vadj detector deglitch time ( s) v cc = 5v v cc = 3.3v v54 detector deglitch time vs. temperature 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 temperature (c) v54 detector deglitch time ( s) v cc = 5v v cc = 3.3v v5 detector deglitch time vs. temperature 10 15 20 25 30 35 40 -50-250 255075100125 temperature (c) v5 detector deglitch time ( s) v cc = 5v v cc = 3.3v
RT9824 6 ds9824-01 april 2011 www.richtek.com supply current vs. temperature 100 125 150 175 200 225 250 -50 -25 0 25 50 75 100 125 temperature (c) supply current ( a ) v cc = 5v v cc = 3.3v v5 pin response time (100ms/div) v5 (5v/div) ctr (5v/div) v cc = 5v reset (5v/div) vadj pin response time (100ms/div) vadj (1v/div) ctr (5v/div) reset (5v/div) v cc = 5v v54 pin response time (100ms/div) v54 (5v/div) ctr (5v/div) reset (5v/div) v cc = 5v mr pin response time (5ms/div) mr (5v/div) ctr (5v/div) reset (5v/div) v cc = 5v
RT9824 7 ds9824-01 april 2011 www.richtek.com application information the RT9824 smart voltage detector monitors three voltage levels at the same time to ensure the micro-processor is operated within the recommended input voltage range. in conventional reset ic application, to monitor one power rail needs one reset ic. the RT9824 can monitor three power rails simultaneously, by using just one reset ic. the RT9824 also provides a manual reset (mr) function for application easily. glitch-rejection is implemented in the RT9824 to prevent it from false operation and to eliminate the additional de-bouncing circuitry. thermal considerations for continuous operation, do not exceed absolute maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of RT9824, the maximum junction temperature is 125 c and t a is the maximum ambient temperature. the junction to ambient thermal resistance ja is layout dependent. for tsot-23-8 package, the thermal resistance ja is 250 c/w on the standard jedec 51-3 single layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / (230 c/w) = 0.435w for tsot-23-8 package the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for RT9824 package, the figure 1 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. figure 1. derating curves for RT9824 package 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w ) tsot-23-8 single layer pcb
RT9824 8 ds9824-01 april 2011 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringemen t of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed b y richtek. richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension tsot-23-8 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.700 1.000 0.028 0.039 a1 0.000 0.100 0.000 0.004 b 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 c 2.591 3.000 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 a a1 b d c h l b e
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